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What is Sigrity X OptimizePI?

Cadence® introduces its Sigrity X OptimizationPI™ technology, which conducts a comprehensive AC frequency analysis of circuit boards and IC packages, enabling performance enhancement and potential savings of 15% to 50% on decoupling capacitor expenditures. This technology caters to both pre-layout and post-layout investigations, efficiently identifying the most economical decoupling capacitor options. The foundation of Sigrity X OptimizePI lies in the established Cadence hybrid magnetic circuit analysis methodology, fused with the innovative Sigrity Optimization engine, allowing users to swiftly determine optimal placement and decap site selection. By leveraging this advanced tool, engineers can enhance design efficiency while simultaneously reducing costs.

What is DipTrace?

The PCB Layout software is a sophisticated engineering application used for designing printed circuit boards, featuring intelligent manual routing suitable for high-speed and differential signals, a shape-based autorouter, comprehensive verification mechanisms, and broad import/export options. Design specifications are defined through net classes and class-to-class regulations, alongside accurate settings configured for different object types within each class or layer. DipTrace significantly improves the design process by implementing real-time design rule checks (DRC), which alert users to errors immediately, preventing them from being saved. It also provides a 3D visualization of the board, which can be exported to mechanical CAD systems for additional modeling. The rigorous design rule checks, connectivity validations of nets, and comparisons with the source schematic ensure the resulting product meets the highest quality standards. Operating within a cohesive environment, DipTrace facilitates smooth transitions from circuit schematics to board layouts, allowing for updates from the schematic and back annotation capabilities. Nets are systematically organized into classes with customizable settings, complemented by class-to-class regulations that enhance orderliness. Vias are meticulously arranged according to their types, such as through and blind/buried vias, contributing to an organized and effective design process. The extensive features of DipTrace not only streamline PCB design tasks but also empower engineers to uphold exceptional quality standards throughout the entire workflow, making it an indispensable asset in the field of electronic design. Furthermore, the ability to quickly adapt to changes and implement revisions in real-time further solidifies DipTrace's reputation as a leading tool for PCB designers.

Media

Media

Integrations Supported

Sigrity X Platform

Integrations Supported

Sigrity X Platform

API Availability

Has API

API Availability

Has API

Pricing Information

Pricing not provided.
Free Trial Offered?
Free Version

Pricing Information

$75 per license
Free Trial Offered?
Free Version

Supported Platforms

SaaS
Android
iPhone
iPad
Windows
Mac
On-Prem
Chromebook
Linux

Supported Platforms

SaaS
Android
iPhone
iPad
Windows
Mac
On-Prem
Chromebook
Linux

Customer Service / Support

Standard Support
24 Hour Support
Web-Based Support

Customer Service / Support

Standard Support
24 Hour Support
Web-Based Support

Training Options

Documentation Hub
Webinars
Online Training
On-Site Training

Training Options

Documentation Hub
Webinars
Online Training
On-Site Training

Company Facts

Organization Name

Cadence Design Systems

Date Founded

1988

Company Location

United States

Company Website

www.cadence.com/en_US/home/tools/ic-package-design-and-analysis/si-pi-analysis-point-tools/sigrity-optimizepi-technology.html

Company Facts

Organization Name

DipTrace

Date Founded

2004

Company Website

diptrace.com/diptrace-software/pcb-layout/

Categories and Features

PCB Design

3D Visualization
Autorouting
Collaboration Tools
Component Library
Design Rule Check
Differential Pair Routing
Schematic Editor

Categories and Features

PCB Design

3D Visualization
Autorouting
Collaboration Tools
Component Library
Design Rule Check
Differential Pair Routing
Schematic Editor

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