Ratings and Reviews 0 Ratings

Total
ease
features
design
support

This software has no reviews. Be the first to write a review.

Write a Review

Ratings and Reviews 0 Ratings

Total
ease
features
design
support

This software has no reviews. Be the first to write a review.

Write a Review

Alternatives to Consider

  • JOpt.TourOptimizer Reviews & Ratings
    10 Ratings
    Company Website
  • RouteGenie Reviews & Ratings
    48 Ratings
    Company Website
  • WaitWell Reviews & Ratings
    188 Ratings
    Company Website
  • Descartes Fleet Management Reviews & Ratings
    28 Ratings
    Company Website
  • Authologic Reviews & Ratings
    2 Ratings
    Company Website
  • onPhase Reviews & Ratings
    217 Ratings
    Company Website
  • Revaly Reviews & Ratings
    7 Ratings
    Company Website
  • Digit Reviews & Ratings
    30 Ratings
    Company Website
  • ManageEngine Log360 Reviews & Ratings
    168 Ratings
    Company Website
  • ManageEngine EventLog Analyzer Reviews & Ratings
    210 Ratings
    Company Website

What is Siemens Aprisa?

Designing at advanced process nodes requires a fresh strategy for place-and-route to effectively manage the increasing complexities involved. Aprisa distinguishes itself as a detailed routing-centric physical design platform specifically designed for modern SoCs. Functioning as a holistic RTL2GDSII solution, Aprisa supports digital implementation by offering extensive synthesis and place-and-route features for both top-level hierarchical designs and individual block executions. Its compatibility with signoff tools for STA timing and DRC ensures a high-quality correlation for tape-out, significantly reducing design closure hurdles while maintaining optimal performance, power efficiency, and area enhancement (PPA). Thanks to its impressive out-of-the-box performance, Aprisa empowers physical designers to optimize each step of the place-and-route process, thereby expediting their time-to-market. Furthermore, the integrated architecture and shared analysis engines in Aprisa provide exceptional timing and DRC correlation throughout all implementation phases and with signoff tools, which greatly diminishes the number of flow iterations and engineering change orders (ECOs). Consequently, this progressive methodology not only boosts productivity but also significantly elevates the quality of design in intricate projects. This shift in approach is vital as the semiconductor industry continues to evolve rapidly, demanding even more sophisticated solutions.

What is SiLogy?

Our cutting-edge web platform dramatically accelerates the efficiency of chip developers and verification engineers, enabling them to design and troubleshoot at speeds tenfold compared to previous methods. Verilator allows users to effortlessly launch and run thousands of tests at once with a single click. It also simplifies the sharing of test results and waveforms within teams, supports tagging colleagues on specific signals, and provides comprehensive tracking for test and regression failures. By leveraging Verilator to generate Dockerized simulation binaries, we adeptly distribute test runs across our computing cluster, after which we can compile the results and log files, with the ability to rerun any tests that did not yield waveforms. The use of Docker guarantees that test executions remain consistent and reproducible. SiLogy ultimately enhances the productivity of chip developers by significantly reducing the time spent on design and debugging tasks. Before SiLogy was introduced, the primary approach for identifying issues in failing tests involved the tedious process of manually extracting lines from log files, analyzing waveforms on individual computers, or rerunning simulations that could take an excessive amount of time, often lasting several days. Now, our platform empowers engineers to devote more time to innovation instead of being hindered by tedious debugging procedures, resulting in a more dynamic and creative work environment. This shift not only improves individual productivity but also fosters collaboration among teams, leading to more efficient project outcomes.

Media

Media

Integrations Supported

Docker
GitHub

Integrations Supported

Docker
GitHub

API Availability

Has API

API Availability

Has API

Pricing Information

Pricing not provided.
Free Trial Offered?
Free Version

Pricing Information

Pricing not provided.
Free Trial Offered?
Free Version

Supported Platforms

SaaS
Android
iPhone
iPad
Windows
Mac
On-Prem
Chromebook
Linux

Supported Platforms

SaaS
Android
iPhone
iPad
Windows
Mac
On-Prem
Chromebook
Linux

Customer Service / Support

Standard Support
24 Hour Support
Web-Based Support

Customer Service / Support

Standard Support
24 Hour Support
Web-Based Support

Training Options

Documentation Hub
Webinars
Online Training
On-Site Training

Training Options

Documentation Hub
Webinars
Online Training
On-Site Training

Company Facts

Organization Name

Siemens

Date Founded

1847

Company Location

United States

Company Website

eda.sw.siemens.com/en-US/ic/aprisa/

Company Facts

Organization Name

SiLogy

Date Founded

2023

Company Location

United States

Company Website

silogy.io

Categories and Features

Categories and Features

PCB Design

3D Visualization
Autorouting
Collaboration Tools
Component Library
Design Rule Check
Differential Pair Routing
Schematic Editor

Popular Alternatives

Oasys-RTL Reviews & Ratings

Oasys-RTL

Siemens

Popular Alternatives

PathWave RFIC Design Reviews & Ratings

PathWave RFIC Design

Keysight Technologies
Tessent Reviews & Ratings

Tessent

Siemens