List of SystemC Integrations
This is a list of platforms and tools that integrate with SystemC. This list is updated as of June 2026.
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Coco Code Coverage
Qt Group
Enhance software reliability with comprehensive code coverage insights.Coco by Qt is an advanced code coverage and test analysis platform designed for developers, QA engineers, and compliance leads building safety-critical or performance-sensitive software. Supporting C, C++, C#, QML, and Tcl, Coco measures coverage from statement and branch analysis to Modified Condition/Decision Coverage (MC/DC), giving a granular view of code quality and test completeness. It integrates seamlessly with IDEs like Visual Studio, Eclipse, and Qt Creator, as well as CI/CD tools such as Jenkins and CMake, enabling automated coverage feedback within existing workflows. Coco’s instrumentation engine works across desktop, embedded, and cross-compiled environments, supporting diverse toolchains like GCC, Clang, ARM, and Green Hills. The platform helps teams meet functional safety requirements under ISO 26262, DO-178C, EN 50128, and IEC 62304, with ready-to-use qualification kits that save months of manual certification work. Its Cross-Compilation Add-on enables coverage analysis on constrained systems and microcontrollers, while the Test Center integration consolidates coverage data and test results for a unified QA dashboard. By highlighting untested logic, redundant test cases, and compliance gaps, Coco reduces testing time while increasing accuracy. Its audit-ready reports and traceable artifacts make it indispensable for industries like automotive, medical devices, rail, and aerospace. Whether running on Windows, Linux, macOS, or real hardware, Coco ensures developers know exactly what’s tested—and what’s missed. In a world where software quality and certification matter more than ever, Coco helps teams measure, optimize, and certify with confidence. -
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ModelSim
Siemens
Empower your FPGA designs with advanced simulation and verification.ModelSim is a powerful tool for simulating behavioral, RTL, and gate-level code, significantly improving both the quality of design and the efficiency of debugging through its platform-agnostic compilation capabilities. Its innovative single kernel simulator technology enables the smooth integration of VHDL and Verilog within one cohesive design environment. This simulator stands out by offering an extensive array of verification features at a competitive price, making it ideal for validating small to medium-sized FPGA designs that are often intricate and critical for mission success. ModelSim also includes advanced code coverage tools that provide crucial metrics, supporting thorough verification efforts. Furthermore, its intuitive interface reduces barriers to the effective use of verification resources, allowing users to focus on design improvements. All coverage information is securely maintained in the highly efficient UCDB database, which offers flexibility in result accessibility. Users can interactively analyze coverage outcomes during or after simulation sessions, including when consolidating results from multiple runs. This comprehensive and user-friendly platform empowers FPGA designers with the sophisticated tools necessary for successful debugging and enhancement of their designs, ultimately leading to more reliable and efficient project outcomes. In conclusion, ModelSim is not just a simulator, but a vital asset for engineers aiming for precision in their FPGA developments.
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