Siemens Solido vs. SiLogy

Thousands of designers at top semiconductor companies worldwide rely on Solido's variation-aware design solutions, which encompass IP validation, library characterization, and advanced simulation technologies powered by state-of-the-art AI. This comprehensive suite includes AI-optimized SPICE, Fast SPICE, and mixed-signal simulators that enable clients to accelerate essential design and verification tasks for sophisticated analog, mixed-signal, and custom IC designs significantly. It provides the fastest and most comprehensive integrated IP validation solution in the industry, guaranteeing thorough IP quality assurance from the initial design stage through to tape-out, while addressing all design aspects and incorporating IP updates efficiently. Additionally, this all-encompassing AI-driven design environment supports both nominal and variation-aware verification for custom IC circuits, ensuring complete design coverage with a dramatically reduced number of simulations, all while achieving accuracy on par with traditional brute-force techniques. In addition, it presents swift and accurate library characterization tools that utilize machine learning to boost performance and reliability. By streamlining these processes, designers can focus more on innovation and less on time-consuming verification tasks.

Our cutting-edge web platform dramatically accelerates the efficiency of chip developers and verification engineers, enabling them to design and troubleshoot at speeds tenfold compared to previous methods. Verilator allows users to effortlessly launch and run thousands of tests at once with a single click. It also simplifies the sharing of test results and waveforms within teams, supports tagging colleagues on specific signals, and provides comprehensive tracking for test and regression failures. By leveraging Verilator to generate Dockerized simulation binaries, we adeptly distribute test runs across our computing cluster, after which we can compile the results and log files, with the ability to rerun any tests that did not yield waveforms. The use of Docker guarantees that test executions remain consistent and reproducible. SiLogy ultimately enhances the productivity of chip developers by significantly reducing the time spent on design and debugging tasks. Before SiLogy was introduced, the primary approach for identifying issues in failing tests involved the tedious process of manually extracting lines from log files, analyzing waveforms on individual computers, or rerunning simulations that could take an excessive amount of time, often lasting several days. Now, our platform empowers engineers to devote more time to innovation instead of being hindered by tedious debugging procedures, resulting in a more dynamic and creative work environment. This shift not only improves individual productivity but also fosters collaboration among teams, leading to more efficient project outcomes.