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What is XJTAG DFT Assistant?

The pace at which your product enters production is contingent upon the testability of your design. Unfortunately, physical testing cannot always detect prevalent errors that may result in expensive delays. With XJTAG®, the DFT Assistant seamlessly integrates into your Altium Designer environment, conducting Design For Test (DFT) evaluations directly on your schematic. This tool allows you to verify that the scan chains are properly linked to every JTAG-enabled component in your design, ensuring accurate and correct connections and terminations of each signal. Before you complete your layout, XJTAG® DFT Assistant thoroughly examines your JTAG-enabled devices, providing a crucial checkpoint. Additionally, XJTAG® Chain Checker identifies typical pitfalls and notifies you promptly, helping to prevent issues that could complicate JTAG testing later on. By implementing these tools, you can significantly enhance the reliability of your design and streamline the manufacturing process.

What is SiLogy?

Our cutting-edge web platform dramatically accelerates the efficiency of chip developers and verification engineers, enabling them to design and troubleshoot at speeds tenfold compared to previous methods. Verilator allows users to effortlessly launch and run thousands of tests at once with a single click. It also simplifies the sharing of test results and waveforms within teams, supports tagging colleagues on specific signals, and provides comprehensive tracking for test and regression failures. By leveraging Verilator to generate Dockerized simulation binaries, we adeptly distribute test runs across our computing cluster, after which we can compile the results and log files, with the ability to rerun any tests that did not yield waveforms. The use of Docker guarantees that test executions remain consistent and reproducible. SiLogy ultimately enhances the productivity of chip developers by significantly reducing the time spent on design and debugging tasks. Before SiLogy was introduced, the primary approach for identifying issues in failing tests involved the tedious process of manually extracting lines from log files, analyzing waveforms on individual computers, or rerunning simulations that could take an excessive amount of time, often lasting several days. Now, our platform empowers engineers to devote more time to innovation instead of being hindered by tedious debugging procedures, resulting in a more dynamic and creative work environment. This shift not only improves individual productivity but also fosters collaboration among teams, leading to more efficient project outcomes.

Media

Media

Integrations Supported

Allegro X Design Platform
Docker
GitHub
OrCAD X

Integrations Supported

Allegro X Design Platform
Docker
GitHub
OrCAD X

API Availability

Has API

API Availability

Has API

Pricing Information

Pricing not provided.
Free Trial Offered?
Free Version

Pricing Information

Pricing not provided.
Free Trial Offered?
Free Version

Supported Platforms

SaaS
Android
iPhone
iPad
Windows
Mac
On-Prem
Chromebook
Linux

Supported Platforms

SaaS
Android
iPhone
iPad
Windows
Mac
On-Prem
Chromebook
Linux

Customer Service / Support

Standard Support
24 Hour Support
Web-Based Support

Customer Service / Support

Standard Support
24 Hour Support
Web-Based Support

Training Options

Documentation Hub
Webinars
Online Training
On-Site Training

Training Options

Documentation Hub
Webinars
Online Training
On-Site Training

Company Facts

Organization Name

Altium

Date Founded

1985

Company Location

United States

Company Website

www.altium.com/products/extensions/platform-extensions/xjtag/overview

Company Facts

Organization Name

SiLogy

Date Founded

2023

Company Location

United States

Company Website

silogy.io

Categories and Features

PCB Design

3D Visualization
Autorouting
Collaboration Tools
Component Library
Design Rule Check
Differential Pair Routing
Schematic Editor

Categories and Features

PCB Design

3D Visualization
Autorouting
Collaboration Tools
Component Library
Design Rule Check
Differential Pair Routing
Schematic Editor

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